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technical note high-performance regulator ic series for pcs ultra low dropout linear regulator controllers for pc chipsets bd3504fvm, BD3500FVM, bd3501fvm, bd3502fvm description the bd3500/01/02/04fvm is an ultra-low dropo ut linear regulator controller for chip set that can achieve ultra-low voltage input to ultra-low voltage output. by using n-mosfet for exter nal power transistor, the controller can be used at ultra-low i/o voltage difference up to voltage difference generated by on resistance. in addition, because best suited power transistor can be chosen in accord with the output current, downsizing and cost reduction of the set can be achieved. because by reducing the i/o voltage difference, large current output is achieved and conversion loss can be reduced, switching power supply can be replaced . bd3500/01/02/04fvm does not need any ch oke coil, diode for rectification and power transistor which are required for switching power supply, total cost of the set can be reduced and compact size can be achieved for the set. using external resistors, optional out put from 0.65v to 2.5v can be set. in addition, since voltage output start-up time can be adjusted by us ing the nrcs terminal, it is possible to flexibly meet the power supply sequence of the set. features 1) reduced rush current by nrcs 2) built-in driver for external nch h transistor 3) adoption of msop8 package: 2.9 x 4.0 x 0.9 (mm) 4) built-in timer latch short protection circuit 5) built-in low input maloperation prevention circuit 6) output voltage variable type 7) built-in overheat protection circuit applications mobile pc, desktop pc, digital home appliances line up parameter BD3500FVM bd3501fvm bd3502fvm bd3504fvm output voltage 1.8v (fix) 1.5v (fix) 1.2v (fix) variable(0.65 2.5v) nrcs (soft start) (independent setting) (independent setting) (independent setting) (same timer latch) timer latch short protection circuit (independent setting) (independent setting) (independent setting) (same nrcs) v in uvlo hysterisis hysterisis hysterisis detected at start-up only (set by external resistor) external fet gate drive current +1/-3ma +1/-3ma +1/-3ma +3/-3ma oct. 2008
2/16 absolute maximum ratings (ta=25 ) bd3500/01/02fvm parameter symbol limit unit input voltage vcc 7 * 1 v drain voltage (vin) vin 7 v enable input voltage ven 7 v power dissipation pd 437.5 * 2 mw operating temperature range topr -10 +100 storage temperature range tstg -55 +150 maximum junction temperature tjmax +150 *1 however, not exceeding pd. *2 pd derating at 3.5mw/ for temperature above ta=25 bd3504fvm parameter symbol limit unit supply voltage vcc 7 * 3 v drain voltage vd 7 v enable input voltage ven 7 v power dissipation pd 437.5 * 4 mw operating temperature range topr -10 +100 storage temperature range tstg -55 +150 maximum junction temperature tjmax +150 *3 however, not exceeding pd. *4 pd derating at 3.5mw/ for temperature above ta=25 recommended operating conditions bd3500/01/02fvm parameter symbol min max unit supply voltage vcc 4.5 5.5 v drain voltage(vin) vin vo1.15 5.5 v enable input voltage ven -0.3 5.5 v capacitor on nrcs terminal cnrcs 0.001 1 uf capacitor on scp terminal cscp 0.001 1 uf no radiation-resistant design is adopted for the present product. bd3504fvm parameter symbol min max unit supply voltage vcc 4.5 5.5 v drain voltage vd 0.65 5.5 v enable input voltage ven -0.3 5.5 v capacitor in nrcs pin cnrcs 0.001 1 uf output voltage vout 0.65 2.5 v no radiation-resistant design is adopted for the present product.
3/16 electrical characteristics (unless otherwise noted, ta = 2 5 vcc=5v vin=3.3v ven=3v) BD3500FVM/bd3501fvm/bd3502fvm parameter symbol standard value unit condition min typ max bias current icc - 0.8 1.6 ma shut down mode current ist - 0 10 ua ven=0v output voltage 1 (BD3500FVM) vo1 1.782 1.800 1.818 v io=50ma output voltage 1 (bd3501fvm) vo1 1.485 1.500 1.515 v io=50ma output voltage 1 (bd3502fvm) vo1 1.188 1.200 1.212 v io=50ma output voltage 2 (BD3500FVM) vo2 1.746 1.800 1.854 v vcc=4.5v to 5.5v ,io=0 to 3a ta = - 1 0 to 100 ( ) output voltage 2 (bd3501fvm) vo2 1.455 1.500 1.545 v vcc=4.5v to 5.5v ,io=0 to 3a ta = - 1 0 to 100 ( ) output voltage 2 (bd3502fvm) vo2 1.164 1.200 1.236 v vcc=4.5v to 5.5v ,io=0 to 3a ta = - 1 0 to 100 ( ) line regulation reg.l - 0.1 0.5 %/v vcc=4.5v to 5.5v load regulation reg.l - 0.5 10 mv io=0 to 3a [enable] high level enable input voltage enhi 2 - vcc v low level enable input voltage enlow -0.3 - 0.8 v enable pin input current ien - 7 10 ua ven=3v [nrcs] nrcs charge current inrcs 14 20 26 ua vnrcs=0.5v,vcc=4.5v to 5.5v ta = - 1 0 to 100 ( ) nrcs standby voltage vnrcs - 0 50 mv ven=0v [voltage feed back] vfb input bias current ifb - 0.7 1.2 ma ven=3v vfb standby current fbstb 150 - - ma ven=0v,vfb=1v [output mosfet driver] mosfet driver source current igso 0.5 1 1.5 ma vfb=vo-0.1v,g=vo+1v mosfet driver sink current igsi 2 3 4 ma vfb=vo+0.1v,g=vo+1v [uvlo] vcc uvlo vccuvlo 4.2 4.35 4.5 v vcc:sweep up vcc uvlo hysteresis vcchys 100 160 220 mv vcc:sweep down vin uvlo vinuvlo vo1.05 v o1.1 vo1.15 v vin:sweep up vin uvlo hysteresis vinhys 100 160 220 mv vin:sweep down [scp] scp charge current iscpch 14 20 26 ua vscp=0.5v,vcc=4.5v to 5.5v ta = - 1 0 to 100 ( ) scp discharge current iscpdi 0.5 - - ma vscp=0.5v scp threshold voltage vscpth 1.2 1.3 1.4 v short detect voltage vscp vo0.6 vo0.7 vo0.8 v scp stand-by voltage vstb - 0 50 mv ( ) design guarantee
4/16 electrical characteristics (unless otherwise noted, ta = 2 5 vcc=5v vin=3.3v ven=3v. r1=r1'= ? , r2=r2'=0 ? ) bd3504fvm parameter symbol standard value unit condition min typ max bias current icc - 0.85 1.7 ma shut down mode current ist - 0 10 ua ven=0v feed back voltage 1 vfb1 0.643 0.650 0.657 v io=50ma feed back voltage 2 vfb2 0.630 0.650 0.670 v vcc=4.5v to 5.5v , ta = - 1 0 to 100 ( ) output voltage vo - 1.20 - v r1=r1'=3.9k ? , r2=r2'=3.3k ? line regulation reg.l - 0.1 0.5 %/v vcc=4.5v to 5.5v load regulation reg.l - 0.5 10 mv io=0 to 3a [enable] high level enable input voltage enhi 2 - vcc v low level enable input voltage enlow -0.3 - 0.8 v enable pin input current ien - 7 10 ua ven=3v [voltage feed back] vfb input bias current ifb - 80 - na [source voltage] vs input bias current isbias - 1.2 2.4 ma vs standby current isstb 150 - - ma vs=1v ven=0v [output mosfet driver] mosfet driver source current igso 2 3 4 ma vfb=0.6v,vgate=2.5v mosfet driver sink current igsi 2 3 4 ma vfb=0.7v,vgate=2.5v [uvlo] vcc uvlo vccuvlo 4.20 4.35 4.50 v vcc:sweep up vcc uvlo hysterisis vcchys 100 160 220 mv vcc:sweep down vd uvlo vduvlo vo0.6 vo0.7 vo0.8 v vd:sweep up [drain voltage sensing] vd input bias current ivd - 0 - na [nrcs/scp] nrcs charge current inrcs 14 20 26 ua vnrcs=0.5v scp charge current iscpch 14 20 26 ua vnrcs=0.5v scp discharge current iscpdi 0.3 - - ma vnrcs=0.5v scp threshold voltage vscp 1.2 1.3 1.4 v short detect voltage voscp vo0.3 vo0.35 vo0.4 v nrcs stand-by voltage vstb - - 50 mv ( ) design guarantee
5/16 reference data 0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 - 60 - 10 40 90 140 ta( ) i(ua) fig.1 ta-i stb fig 9. input sequence 2 vin fig.10 input sequence 3 vcc fig.11 input sequence 4 (only bd3504fvm) fig.12 transient response 0 3a(0.6a s) ? =30mv 0.00 0.20 0.40 0.60 0.80 1.00 4.5 4.7 4.9 5.1 5.3 5.5 vcc(v) icc(ma) fig.2 icc-vcc 1.770 1.775 1.780 1.785 1.790 1.795 1.800 -1015406590 ta( ) vo(v) 6 7 8 9 10 11 12 25 50 75 100 125 150 ta( ) ien(ua) 18.5 19 19.5 20 20.5 21 21.5 -60 -10 40 90 140 ta( ) iscp(ua) 1.23 1.235 1.24 1.245 1.25 1.255 1.26 -60 -10 40 90 140 ta( ) vbg(v) 0 50 100 150 200 250 300 0 0.2 0.4 0.6 0.8 1 1.2 vout(mv) is(ma) fig.3 ta-vo fig.4 ta-i en fig.5 vs discharge current fig.6 ta-i scp fig.7 ta-vo fig.8 input sequence 1 en vcc vin en vout vcc vin en vou t vcc vin en vout vin en vout vout iout (1.075v ) (1.075v ) (1.075v ) (1.075v ) (1a/div) vo(v)
6/16 fig.13 transient response 3 0a(0.6a/ s) v=20m fig.14 transient response 0 3a(0.6a/ s) v=21mv fig.15 transient response 3 0a(0.6a/ s) v=17mv fig.16 transient response 0 3a(0.6a/ s) v=42m fig.17 transient response 3 0a(0.6a/ s) v=27m fig.18 transient response 0 3a(0.6a/ s) v=44m fig.19 transient response 3 0a(0.6a/ s) v=26m fig.20 transient response 0 3a(0.6a/ s) v=44m fig.21 transient response 3 0a(0.6a/ s) v=23m vout iout (1.075v ) (1a/div) vout iout (bd3502fvm) (1a/div) vout iout (bd3502fvm) (1a/div) vout iout (bd3501fvm) (1a/div) vout iout (bd3501fvm) (1a/div) vout iout (BD3500FVM) (1a/div) vout iout (BD3500FVM) (1a/div) vout iout (1.05v ) (1a/div) vout iout (1.05v )
7/16 block diagram BD3500FVM/bd3501fvm/bd3502fvm bd3504fvm reference block thermal protection vcc vcc uvlo1 vd uvlo latch uvlo2 uvlo1 en tsd scp uvlo1 uvlo2 en nrcs 0.65 v vfb g vd vs r2 r1 vin vo en enable 0.65v nrcs scp scp gnd nrcs nrcs 0.65v r1? r2? tsd vref reference block thermal protection uvlo1 vref vref scp scp gnd vfb g vin vin vo vref uvlo2 nrcs vcc vcc en enable vref tsd scp uvlo1 uvlo2 nrcs tsd 4 1 5 7 6 2 3 8 4 3 1 2 5 6 7 8
8/16 BD3500FVM/bd3501fvm/bd3502fvm pin configration pin function pin no. pin name pin function 1 nrcs (non rush current on start up) time setup 2 gnd ground pin 3 scp timer latch setup for short circuit protection 4 vcc power source 5 vin drain voltage sense 6 vfb output voltage feedback 7 g mosfet driver output 8 en enable bd3504fvm pin configration pin function pin no. pin name pin function 1 nrcs nrcs (non rush current on start up) time setup. timer latch setup for short circuit protection operating time set up pin. 2 gnd ground pin 3 en enable pin 4 vcc power source 5 vfb output voltage feedback 6 vs source voltage pin 7 g mosfet driver output 8 vd drain voltage sense 1 2 3 4 5 6 7 8 g en vfb vin nrcs gnd scp vcc 1 2 3 4 5 6 7 8 g vd vs vfb nrcs gnd en vcc
9/16 pin function ? vcc bd3500/01/02/04fvm has an independent power input pin for an internal circuit operation of ic. this is used for bias of ic int ernal circuit and external n-mosfet. the voltage used of vcc terminal is 5.0v and maximum current is 1.7 ma. it is recommended to connect a bypass capacitor of 0.1 f or so to vcc pin. ? en with an input of 2.0 volts or higher, the en terminal turns to ?h igh? level and vout is outputted. at 0.8v or lower, it detect s ?low? level and vout is turned off and simultaneously, the discharge circuit inside the vs termi nal is activated and lowers output voltage (150 ma (min) when vfb//vs=1v and ven=0v). ? vin(bd3500/01/02fvm) the vin terminal is a drain voltage detection terminal of external n-mosfet. in the event that the vin terminal is lower than 1.1 times the output set voltage, output is turned off to prevent low-input maloperation. ? vd(bd3504fvm only) the vd terminal is a drain voltage detection terminal of external n-mosfet. in the event that drain voltage (vin) is low, outp ut voltage is turned off to prevent low-input maloperation. the reset voltage (vduvlo) of drain voltage low-input maloperation prevention circuit is deter mined by the following equation: in the event that the maloperation prevention set resistance at the time of low-input drain voltage is set to a resistance valu e same as output voltage set resistor (r1 = r1?, r2 = r2?), low-input maloperation prevention (uvlo) is reset when drain voltage (vin) reaches 70% of the output volt age. uvlo detects only at the startup of the en terminal. ? vfb(bd3504fvm only) the vfb terminal is a terminal to decide output voltage and is determined by the following equation: vfb is controlled to achieve 0.65 v (typ.). ? nrcs terminal he nrcs terminal is a constant current output terminal, and operates as ? soft-start ... during start-up ? scp-delay ... after start-up (bd3504fvm only). how to set soft-start of nrcs terminal the output voltage startup time (tnrcs) is determined by the time when the nrcs terminal reaches vfb (0.65v). during start-up , the nrcs terminal serves as a constant current source (inrcs) of 20 ua (typ.) out put, and charges capacitor (cnrcs) externally connected. by cha nging over to internal reference voltage (0.65v) when the nrcs terminal reaches 0.65v, output voltage (vout) is fixed. how to set nrcs terminal short pr otection delay (bd3504fvm only) bd3504fvm has short protection (scp) activated when output voltage be comes vout x 0.35 (typ.) or lower. the time when short p rotection is activated until latching takes place (t scp ) is determined by the following equation: tscp = cnrcs voscp iscp when short protection is activated, the nrcs terminal provides 20 ua (typ.) constant current output (lscp), and charges the cap acitor (cnrcs) externally connected. when the nrcs terminal reaches 1.3v (voscp), latch operation is carried out and output voltage is turned off. ? scp(bd3500/01/02fvm) bd3500/01/02fvm has short protection (scp) activated when output becomes 70% or lower than the set voltage. the time when shor t protection is activated until latching takes place (t scp ) is determined by the following equation: tscp = cnrcs voscp iscp when short protection is activated, the nrcs terminal provides 20 ua (typ.) constant current output (lscp) , and charges the cap acitor (cnrcs) externally connected. when the nrcs terminal reaches 1.3v (voscp), latch operation is carried out and output voltage is turned off. ? vfb//vs (BD3500FVM/bd3501f vm/bd3502fvm//bd3504fvm) vfb//vs terminal is a source voltage detectio n terminal of external n-mosfet. vfb//v s terminal has the internal discharge circ uit activated to lower output voltage when en becomes a low level or various prot ection circuits (tsd, scp, uvlo) are activated. ? g g terminal is a gate drive terminal of external n-mosfet. because the output voltage range of g terminal is up to 5v (vcc), it is necessary to use n-mosfet whose threshold is lower than ?5v-vout.? in addition, by incorporating a rc snubber circuit to the g terminal, phase allowance of loop gain can be increased and the terminal can accommodate ceramic capacitors. vduvlo=vfb 0.7 r1?+r2 r1? vout=vfb r1?+r2 r1?
10/16 application circuit directions for pattern layout of pcb ? because a vin input capacitor causes impedance to drop, mount it as close to the vin terminal as possible and use thick wiring patterns. in the event that it c auses the wire to come in contact with t he inner-layer ground plane, use a plurality of through holes. ? because the nrcs terminal is analog i/o, ta ke care to noise. in particular, hi gh-frequency noise of gnd may cause ic maloperation through capacitors. it is recommended to conn ect gnd of nrcs capacitor to ic gnd terminal at one point. ? the vfb terminal is an output voltage sense line. effects of wiring impedance can be ignored by sensing the output voltage from the load side, but increased sense wiring causes vfb to be susceptible to noise, to which care must be taken. ? because the gnd terminal is gnd to be used in analog circuit in side bd3501/02/04fvm, connect it at one point to inner-layer gnd of substrate by as short pattern as possible. arrange a bypass capacitor across vcc and gnd as close as possible so that a loop can be minimized. ? the g terminal is a terminal for gate drive. if long wiring is inevitable, increase the pattern width and lower impedance. ? heat generated in the output tr ansistor can be calculated by: (vin - vout) io(max) design heat generation not to exceed t he guarantee temperature of transistor. ? connect the output capacitor with thick short wiring so that t he impedance is lowered. connect capacitor gnd to inner-layer gnd plane by a plurality of through holes. c3 c2 ven c4 c5 vin c1 vcc + 1 2 3 4 8 7 6 5 vin r1? r2? c3 ven c4 c1 vcc + 1 2 3 4 8 7 6 5 c2 r1 r2
11/16 evaluation board (bd3500/01/02fvm) part no value company parts name u1 - rohm bd3500/01/02fvm u2 nmos rohm rtw060n03 c1 1uf rohm mch184cn105kk c2 0.01uf rohm part no value company parts name c3 0.01uf rohm c4 10uf rohm mch218cn106k c5 220uf sanyo,etc 2r5tpe220mf evaluation board (bd3504fvm) part no value company parts name u1 - rohm bd35304fvm u2 nmos rohm rtw060n03 r1 3.9k rohm mcr03ezpf3901 r1? 3.3k rohm mcr03ezpf3301 r2 3.9k rohm mcr03ezpf3901 part no value company parts name r2? 3.3k rohm mcr03ezpf3301 c1 1uf rohm mch184cn105kk c2 0.01uf rohm mch185cn103kk c3 10uf rohm mch218cn106kp c4 220uf sanyo,etc 2r5tpe220mf bd3504fvm evaluation board circuit bd3504fvm g en vcc nrcs vd vs gnd vcc s1 3 6 5 7 u1 vfb gnd vtts 1 c1 4 2 vcc 8 vin vout c2 c3 c4 u2 r2? r1? r2 r1 bd3504fvm evaluation board application components bd3504fvm evaluation board layout silk screen top layer bottom layer bd350xfvm evaluation board circuit bd350xfvm evaluation board layout silk screen top layer bottom layer bd350xfvm evaluation board application components bd350xfvm g en vcc nrcs vin vfb gnd vcc s1 8 6 7 u1 1 c1 4 2 vcc vin vout c3 c4 c5 u2 scp 3 c2 5
12/16 i/o equivalence circuit BD3500FVM/bd3501fvm/bd3502fvm bd3504fvm nrcs vcc vcc vcc vi vcc vcc vcc gate scp vcc vcc en vfb vcc vcc nrcs vcc vcc vd vs vcc gate en vfb vcc vcc vcc
13/16 note for use 1.absolute maximum ratings for the present product, thoroughgoing quality control is carried out , but in the event that applied voltage, working temperatu re range, and other absolute maximum rating are exceeded, t he present product may be destroyed. bec ause it is unable to identify the short m ode, open mode, etc., if any special mode is assumed, which exceeds th e absolute maximum rating, physical safety measures are reques ted to be taken, such as fuses, etc. 2.gnd potential bring the gnd terminal potential to the mini mum potential in any operating condition. 3.thermal design consider allowable loss (pd) under actual working condition and carry out thermal de sign with sufficient margin provided. 4.terminal-to-terminal shor t-circuit and erroneous mounting when the present ic is mounted to a printed circuit board, take ut most care to direction of ic and displacement. in the event that the ic is mounted erroneously, ic may be destroyed. in the event of shor t-circuit caused by foreign matter that enters in a clearance be tween outputs or output and power-gnd, the ic may be destroyed. 5.operation in strong electromagnetic field the use of the present ic in the strong electromagnetic field may result in mal operation, to which care must be taken. 6.built-in thermal shutdown protection circuit the present ic incorporates a thermal shutdown protection circ uit (tsd circuit). the worki ng temperature is 175c (standard va lue) and has a -15c (standard value) hysteresis width. when the ic ch ip temperature rises and the tsd circuit operates, the output ter minal is brought to the off state. the built-in thermal shutdown protec tion circuit (tsd circuit) is first and foremost intended for in terrupt ic from thermal runaway, and is not intended to protect and warrant the ic. consequently, never attempt to continuously use the ic aft er this circuit is activated or to us e the circuit with the activa tion of the circuit premised. 7.capacitor across output and gnd in the event a large capacitor is connected across output and gnd, when vcc and vin are short-circuited with 0v or gnd for some kind of reasons, current charged in the capacitor flows into the output and may destroy the ic. use a capacitor smaller than 1000 f between output and gnd. 8.inspection by set substrate in the event a capacitor is connected to a pin with low impedance at the time of ins pection with a set substrate, there is a fe ar of applying stress to the ic. therefore, be sure to discharge electricity for every process. as electr ostatic measures, provide grounding in the assembly process, and take utmost care in transportation and st orage. furthermore, when the set substrate is connected to a ji g in the inspection process, be sure to turn off power supply to connect the jig and be sure to turn off power supply to remove the jig. 9.ic terminal input the present ic is a monolithic ic and has a p substrate and p + isolation between elements. with this p layer and n layer of each element, pn junction is formed, and when the potential relation is ? gnd>terminal a>terminal b, pn junction works as a diode, and ? terminal b>gnd terminal a, pn junction operates as a parasitic transistor. the parasitic element is inevitably formed bec ause of the ic construction. the operati on of the parasitic element gives rise t o mutual interference between circuits and results in malfunction, and ev entually, breakdown. consequently, take utmost care not to use the ic to operate the parasitic element such as applying voltage lo wer than gnd (p substrate) to the input terminal. (pin a) p+ p+ n n n p p substrate gnd gnd n p n c b e gnd p+ p+ n n resistor npn transistor structure (npn) (pin b) parasitic diode gnd (pin a) c e b gnd nearby other device (pin b) parasitic diode parasitic diode parasitic diode p substrate
14/16 10.output capacitor (c5) connect the output capacitor between vo1, vo2 terminals and gnd te rminal without fail in order to stabilize output voltage. th e output capacitor has a role to compensate for the phase of loop gain and to reduce output voltage fluctuation when load is rapidly cha nged. when there is an insufficient capacity value, there is a possibi lity to cause oscillation, and w hen the equivalent serial resis tance (esr) of the capacitors is large, output voltage fluctuation is increased when load is rapidly changed. about 220 f high-performance electrolytic capacitors are recommended, but this greatly depends on the gate capacity of external mosfet and mutual conductance (gm), temperature and load conditions. in addition, when only ceramic capacitors with low esr are used, or various capacitors are co nnected in series, the total phase allowance of l oop gain becomes not sufficient, and oscilla tion may result. thoroughgoing confirmation at application temperature and under load range conditions is requested. 11.input capacitor setting method (c1, c4) the input capacitor plays a part to lower output impedance of a power supply connected to input terminals (vcc, vin). when out put impedance of this power supply increases, t he input voltages (vcc, vin) become unstabl e and there is a possibility of giving ri se to oscillation and degraded ripple reject ion characteristics. the us e of capacitors of about 10 f with low esr, which provide less capacity value changes caused by temperature changes, is recommended, but since input capacitor greatly depends on characteristics of th e power supply used for input, substrate wiring pattern, and mosfet gate-drain capa city, thoroughgoing confirmation under the applicati on temperature, load range, and m-mosfet conditions is requested. 12.nrcs terminal capacitor setting method (c3) to the present ic, there mounted is a function (non rush current on start-up: nrcs) to prevent rush current from vin to load an d output capacitor via vo at the output voltage start-up. when the en termi nal is reset from hi or uvlo, constant current is allowed to flow from the nrcs terminal. by this current, voltage generated at the nrcs terminal becomes the reference voltage and output voltage is sta rted. in order to stabilize the nrcs set time, it is recommended to use a ca pacitor (b special) with less capacity value change caused b y temperature change. 13.scp terminal capacitor setting method (c2) the present ic incorporates a timer-latch type short-circuit prot ection circuit in order to pr event mosfet from being destroyed by abnormal current when output terminal is short-circ uited (operates at the time of nrcs, too). when the output terminal voltage drops 30 % from output setting voltage, ic judges that the output is short-circuited. in such event, c onstant current begins to flow. when th e voltage generated in the scp terminal reaches 1.3v (typ) by this current, the gate terminal is brought to the low level. in order to s tabilize the scp setting time, a capacitor (b special) with less capacity value change caused by temperature changes is recommended. when t he scp function is not used, short-circuit the scp terminal to the gnd terminal. in addi tion, when the output terminal is short-c ircuited, the mosfet gate voltage reaches the vcc voltage and the large current that meets mosfet characteristics flows to the output while t he timer latch type protection circuit operat es. when the current capacity of vin termi nal power supply lacks, the vin terminal voltage lowers and the uvlo circuit operates, and the latch operat ion may not be finished. in such ev ent, connect a limiting resistor across drai n terminal and vin terminal of mosfet. 14.input terminals (vcc, vin, en) in the present ic, n terminal, vin termi nal, and vcc terminal have an independent construc tion. in addition, in order to preve nt malfunction at the time of low input, the uvlo function is equi pped with the vin terminal and the vcc terminal. they begin to start output voltage when all the terminals reach threshold voltage wit hout depending on the input order of input terminals. 15.maximum output current (maximum load) the maximum output current capacity of the power supply which is composed by the use of the present ic depends on the external fet. consequently, confirm the characteristics of the power requi red for the set to be used, choose the external fet. 16.operating ranges if it is within the operating ranges, cert ain circuit functions and operat ions are warranted in the working ambient temperature range. with respect to characteristic val ues, it is unable to warrant standard values of el ectric characteristics but there are no sudden v ariations in characteristic values within these ranges. 17.allowable loss pd with respect to the allowable loss, the thermal derating char acteristics are shown in the ex hibit, which we hope would be used as a good-rule-of-thumb. should the ic be used in such a manner to ex ceed the allowable loss, reduction of current capacity due to chip temperature rise, and other degraded properties inherent to the ic would result. you are strongly urged to use the ic within t he allowable loss. 18.the use in the strong electromagnetic field may someti mes cause malfunction, to which care must be taken. 19.in the event that load containing a la rge inductance component is connected to t he output terminal, and generation of back-e mf at the start-up and when output is turned off is assumed, it is requested to insert a protection diode. 19. in the event that load containing a large inductance component is connected to the output terminal, and generation of back- emf at the start-up and when output is turned off is assumed, it is requested to insert a protection diode. 20.we are certain that examples of app lied circuit diagrams are recommendable, but you are requested to thoroughly confir m the characteristics before using the ic. in addition, when the ic is used with the external circ uit changed, decide the ic with sufficient margin provided while consideration is being given not only to static characteristics but also variati ons of external parts and our ic includin g transient characteristics. output pin (example)
15/16 power dissipation ordering part number package specification b d 3 5 0 4 v D t r f part number package type tr : embossed carrier tape ? bd3504 ? bd3502 ? bd3501 ? bd3500 ? fvm : msop8 m ambient temperature [ta] power dissipation [pd] without heat sink. j-a=286 /w 0 [mw] 437.5mw 25 50 75 100 125 150 0 100 200 300 400 500 100 [ ] embossed carrier tape tr (the direction is the 1pin of product is at the upper light when you hold reel on the left hand and you pull out the tape on the right hand) tape quantity direction of feed 3000 p cs reel 1pin x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x msop8 (unit:mm) 4 1 5 8 2.9 0.1 0.475 0.22 0.65 4.0 0.2 0.6 0.2 0.29 0.15 2.8 0.1 0.75 0.05 0.08 0.05 0.9max. 0.08 s + 0.05 ? 0.04 0.145 + 0.05 ? 0.03 0.08 m direction of feed when you order , please order in times the amount of package quantity.
16/16 catalog no.08t439a '08.10 rohm ?
appendix1-rev3.0 thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact your nearest sales office. rohm customer support system the americas / europe / asia / japan contact us : webmaster@ rohm.co. jp www.rohm.com copyright ? 2008 rohm co.,ltd. 21 saiin mizosaki- cho, ukyo-ku, kyoto 615-8585, japan tel : +81-75-311-2121 fax : +81-75-315-0172 appendix notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specified herein is subject to change for improvement without notice. the content specified herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specifications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specified in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no respon- sibility for such damage. the technical information specified herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices). the products are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possi bility of physical injury, fire or any other damage caused in the event of the failure of any product, such as derating, redundancy, fire control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which re quires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specified herein that may be controlled under the f oreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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